Aditya Venkatesh's Personal Website

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Category: Projects

Projects I worked on

  • Project – 16-bit RISC Processor

    RISC, or Reduced Instruction Set Computer, is a type of processor architecture that uses simplified CPU instructions, making them faster and more granular. In this project, I built a 16-bit processor with SystemVerilog and ran it on a Spartan-7 FPGA. The processor was built to follow a subset of the SLC-3 RISC ISA. Hardware Description…

  • Project – FPGA Raycasting Engine

    Raycasting is a computer graphics technique that involves projecting rays from a viewpoint through each pixel of a 2D screen into a 3D scene. This can be used to quickly calculate pixel color and segment sizes, resulting in a render of 3D objects. I built a raycasting engine using SystemVerilog and ran it on a…

  • Project – UNIX OS for RISC-V and an Ext2-like File System

    Earlier this year, two friends and I set out to build a UNIX-based OS for a RISC-V processor. Delegating the work amongst us left me primarily working on the file system for the operating system. The file system I designed and built was based on the ex2 file system. Introduced in 1993, ext2 (second extended…

  • Project – Web-Search RAG Chatbot

    Try it out now: https://aditya-rag-app.streamlit.app/ As LLMs have become more ubiquitous, tools to build with them have evolved as well. In fact, they’ve improved to the point that even apps like Perplexity no longer seem daunting to build at a smaller scale. To learn more about building with LLMs, I created a RAG (Retrieval-Augmented Generation)…